Web site management - Chapter 21: The Memory Hierarchy Figure 21.1: Organization
Chapter 21: The Memory Hierarchy Figure 21.1: Organization of a direct-mapped cache. Key field of the address is used to index the tags array and the data blocks; if tags[key] matches the tag field of the address then the data is valid (cache hit). Word index is used to select a word from the cache block. Figure 21.2: The memory hierarchy. Figure 21.3: Alignment of data objects (or basic blocks) to avoid crossing cache-block boundaries is often worthwhile, even at the cost of empty space between objects. Figure 21.4: If x is rarely true, basic-block placement (a) will occupy three in-cache blocks, while (b) will usually occupy only two. Figure 21.5: Execution of a dot-product loop, with 4-word cache blocks. (a) Without prefetching, on a machine with dynamic instruction reordering, the number of outstanding instructions (reserved registers) grows proportionally to the cache-miss latency. (b) With prefetching, the hardware reservation table never grows large. (Steady-state behavior is shown here, not the initial transient.) Figure 21.7: Matrix multiplication. Each element of C is computed from a row of A and a column of B. With blocking, a c c block of the C matrix is computed from a c N block of A and a N c block of B. Team-Fly
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